Many of the fabrication techniques developed for manufacturing integrated circuits on silicon wafers have been adapted to fabricating displays and other circuits on large flat panels of glass and other material. The flat panel may be formed into computer or television displays. More recently, interest has arisen in using the same type of equipment for fabricating thin-film solar cells. Flat panel fabrication equipment has long been distinguished from wafer fabrication equipment by the size and the rectangular shape of the panels. Some of the earliest flat panels had a size of about 500 mm on a side, but there has been a continuing trend to larger panels. Some of the most recent equipment process panels of size 2200 mm×2500 mm versus the current generation of 300 mm circular wafers. This generation of equipment is accordingly referred to as 55K because the panels have a total area of 55,000 cm2. Yet larger panels are being contemplated.
One of the important techniques used in fabricating panels displays is plasma enhanced chemical vapor deposition (PECVD), which is used to deposit the semiconducting layer of typically amorphous hydrogenated silicon and an insulating layer typically of amorphous hydrogenated silicon nitride. The amorphous silicon may be doped to either conductivity type in order to form the p-n junction required in transistors or solar cells. The process may also be used to deposit layers of silicon oxide and other materials. The quality and uniformity of these layers, particularly the silicon and silicon nitride layers, are important in commercial operation.